GQSPI_TX_THRESH (QSPI) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

GQSPI_TX_THRESH (QSPI) Register Description

Register NameGQSPI_TX_THRESH
Offset Address0x0000000128
Absolute Address 0x00FF0F0128 (QSPI)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000001
DescriptionGQSPI TX FIFO Threshold Level

Software Driver name: XGQSPIPS_TX_THRESH

GQSPI_TX_THRESH (QSPI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:6razRead as zero0x0reserved
Level_TX_FIFO 5:0rwNormal read/write0x1Defines the level at which the TX FIFO not full interrupt is generated.
Note: Change this value only when controller is not communicating with the memory device.