WCR5 (R5_DBG_1) Register Description
| Register Name | WCR5 |
|---|---|
| Offset Address | 0x00000001D4 |
| Absolute Address | 0x00FEBF21D4 (CORESIGHT_R5_DBG_1) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Watchpoint Control Register 5 |
WCR5 (R5_DBG_1) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Watchpoint_address_mask | 28:24 | rwNormal read/write | 0 | This field watches a range of addresses by masking lower order address bits out ofthe watchpoint comparison. b00000 = no mask b00001 = Reserved b00010 = Reserved b00011 = 0x00000007mask for data address b00100 = 0x0000000Fmask for data address b00101 = 0x0000001Fmask for data address .. b11111 = 0x7FFFFFFFmask for data address. Note . If WCR[28:24] is not set to b00000, then WCR[12:5] must be set to b11111111. Otherwise the behavior is Unpredictable. . If WCR[28:24] is not set to b00000, then the corresponding WVR bits that are not being included in the comparison Should Be Zero. Otherwise the behavioris Unpredictable. . To watch for a write to any byte in an 8-byte aligned object of size8 bytes, Arm recommends that a debugger sets WCR[28:24] tob00111, and WCR[12:5] to b11111111. This is compatible with both Armv7 debug compliant implementationsthat have an 8-bit WCR[12:5] and with those that have a 4-bit WCR[8:5] byte address select field. |
| E | 20 | rwNormal read/write | 0 | Enable linking bit: 0 = linking disabled 1 = linking enabled. When this bit is set, this watchpoint is linked with the context ID holding BRP selected by the linked BRP field. |
| Linked_BRP | 19:16 | rwNormal read/write | 0 | Linked BRP number. The binary number encoded here indicates a context ID holding BRP to link this WRP with. If this WRP is linked to a BRP that is not configured for linked context ID matching, it is Unpredictable whether a watchpoint debug event is generated. |
| Byte_address_select | 12:5 | rwNormal read/write | 0 | The WVR is programmed with word-aligned address.You can use this field to program the watchpoint so it only hits if certain byte addresses are accessed: b00000000 The watchpoint never hits. bxxxxxxx1 The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFFC) +0 is accessed. bxxxxxx1x The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFFC) +1 is accessed. bxxxxx1xx The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFFC) +2 is accessed. bxxxx1xxx The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFFC) +3 is accessed. bxxx1xxxx The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFF8) +4 is accessed. bxx1xxxxx The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFF8) +5 is accessed. bx1xxxxxx The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFF8) +6 is accessed. b1xxxxxxx The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFF8) +7 is accessed. |
| LS | 4:3 | rwNormal read/write | 0 | Load/store access. The watchpoint can be conditioned to the type of access: b00 = Reserved b01 = load, load exclusive, or swap b10 = store, store exclusive or swap b11 = either. A SWPor SWPBtriggers on load, store, or either. A load exclusive instruction triggers on load or either. A store exclusive instruction triggers on store oreither, whether it succeeds or not. |
| S | 2:1 | rwNormal read/write | 0 | Privileged access control.The watchpoint can be conditioned to the privilege of the access: b00 = reserved b01 = Privileged, match if the processor does a privileged access to memory b10 = User, match only on non-privileged accesses b11 = either, match all accesses. Note For all cases, the match refers to the privilege of the access, not the mode of the processor. |
| W | 0 | rwNormal read/write | 0x0 | Watchpoint enable: 0 = Watchpoint disabled. 1 = Watchpoint enabled. |