DCUGCR (DDR_PHY) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DCUGCR (DDR_PHY) Register Description

Register NameDCUGCR
Offset Address0x0000000310
Absolute Address 0x00FD080310 (DDR_PHY)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionDCU General Configuration Register

DCUGCR (DDR_PHY) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:16roRead-only0x0Reserved. Return zeros on reads.
RCSW15:0rwNormal read/write0x0Read Capture Start Word: The capture and compare of read data
should start after Nth word. For example setting this value to 12 will
skip the first 12 read data.