AMS (SATA_AHCI_VENDOR) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

AMS (SATA_AHCI_VENDOR) Register Description

Register NameAMS
Offset Address0x000000004C
Absolute Address 0x00FD0C00EC (SATA_AHCI_VENDOR)
Width32
TyperoRead-only
Reset Value0x00000004
DescriptionAXI Master Status

Indicates the status of the AXI Master state machines for both Port 0 and Port 1. Note: All Status Registers have no predefined Reset value. The value shown in reset is a typical value that will be read after reset but will be dependent on the SERDES status, the actual value read can differ from this.

AMS (SATA_AHCI_VENDOR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:12roRead-only0x0Reserved
AMS111:7roRead-only0x0AXI Master State 1 (AMS1)
Refer to [AMS0] bit.
AMS0 6:2roRead-only0x1AXI Master State 0 (AMS0)
0: MRWSIdle
1: MRWWA
2: MRWWGCH
3: MRWWT
4: MRWCC
5: MRWSC
6: MRWWSF
7: MRWATAPI
8: MRWDRL
9: MRWWDR
10: MRWWDRC
11: MRWWDRF
12: MRWDWL
13: MRWWDW
WAS 1roRead-only0x0Write Arbiter State (WAS)
0: AXIAddrWS
1: AXIAddrWReady
RAS 0roRead-only0x0Read Arbiter State (RAS)
0: AXIRDataWS
1: AXIRDataWReady