ATTR_9 (PCIE_ATTRIB) Register Description
| Register Name | ATTR_9 |
|---|---|
| Offset Address | 0x0000000024 |
| Absolute Address | 0x00FD480024 (PCIE_ATTRIB) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x0000FFFF |
| Description | ATTR_9 |
This register should only be written to during reset of the PCIe block
ATTR_9 (PCIE_ATTRIB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr_bar1 | 15:0 | rwNormal read/write | 0xFFFF | Specifies mask/settings for Base Address Register (BAR) 1 if BAR0 is a 32-bit BAR, or the upper bits of {BAR1,BAR0} if BAR0 is a 64-bit BAR. If BAR is not to be implemented, set to 32h00000000. See BAR0 description if this functions as the upper bits of a 64-bit BAR. Bits are defined as follows: Memory Space BAR (not upper bits of BAR0) [0] = Mem Space Indicator (set to 0) [2:1] = Type field (10 for 64-bit, 00 for 32-bit) [3] = Prefetchable (0 or 1) [31:4] = Mask for writable bits of BAR; if 32-bit BAR, set uppermost 31:n bits to 1, where 2^n=memory aperture size in bytes. If 64-bit BAR, set uppermost 63:n bits of {BAR2,BAR1} to 1. IO Space BAR 0] = IO Space Indicator (set to 1) [1] = Reserved (set to 0) [31:2] = Mask for writable bits of BAR; set uppermost 31:n bits to 1, where 2^n=i/o aperture size in bytes. |