PLL_REF_SEL3 (SERDES) Register Description
Register Name | PLL_REF_SEL3 |
---|---|
Offset Address | 0x000001000C |
Absolute Address | 0x00FD41000C (SERDES) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x0000000E |
Description | Register value is generated by Vivado PCW. |
PLL_REF_SEL3 (SERDES) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
PLL_REF_SEL3_31_8_rsvd | 31:8 | roRead-only | 0x0 | Value generated by PCW. |
PLL_REF_SEL0_7_rsvd | 7 | roRead-only | 0x0 | Value generated by PCW. |
PLL_REF_SEL0_6_rsvd | 6 | roRead-only | 0x0 | Value generated by PCW. |
PLL_REF_SEL0_5_rsvd | 5 | roRead-only | 0x0 | Value generated by PCW. |
pllrefsel3 | 4:0 | rwNormal read/write | 0xE | Value generated by PCW. |