ECC_Error_Count_Register (NAND) Register Description
| Register Name | ECC_Error_Count_Register |
|---|---|
| Offset Address | 0x0000000038 |
| Absolute Address | 0x00FF100038 (NAND) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | ECC Error Count |
ECC_Error_Count_Register (NAND) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:17 | razRead as zero | 0x0 | reserved |
| Page_bound_Err_count | 16:8 | roRead-only | 0x0 | Total error count for the entire page. This register should be read after every page is read. |
| Packet_bound_Err_count | 7:0 | roRead-only | 0x0 | Error count during read for every packet count. SW should read this register after every packet size amount of data is read. |