ATTR_41 (PCIE_ATTRIB) Register Description
| Register Name | ATTR_41 |
|---|
| Offset Address | 0x00000000A4 |
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| Absolute Address |
0x00FD4800A4 (PCIE_ATTRIB)
|
|---|
| Width | 32 |
|---|
| Type | rwNormal read/write |
|---|
| Reset Value | 0x00000160 |
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| Description | ATTR_41 |
|---|
This register should only be written to during reset of the PCIe block
ATTR_41 (PCIE_ATTRIB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| attr_msi_cap_per_vector_masking_capable | 9 | rwNormal read/write | 0x0 | MSI Per-Vector Masking Capable. The value is transferred to the MSI Control Register[8]. When set, adds Mask and Pending Dword to Cap structure |
| attr_msi_cap_on | 8 | rwNormal read/write | 0x1 | Indicates that the MSI structures exists. If this is FALSE, then the MSI structure cannot be accessed via either the link or the management port. |
| attr_msi_cap_nextptr | 7:0 | rwNormal read/write | 0x60 | MSI Capabilitys Next Capability Offset pointer to the next item in the capabilities list, or 00h if this is the final capability. |