GP_CONTR_REG_PERF_CNT_0_ENABLE (GPU) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

GP_CONTR_REG_PERF_CNT_0_ENABLE (GPU) Register Description

Register NameGP_CONTR_REG_PERF_CNT_0_ENABLE
Offset Address0x000000003C
Absolute Address 0x00FD4B003C (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionGP Control Register Performance Counter 0 Enable

GP_CONTR_REG_PERF_CNT_0_ENABLE (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1rwNormal read/write0x0Reserved, write as zero, read undefined
GP_CONTR_REG_PERF_CNT_0_ENABLE 0rwNormal read/write0x0Enable performance counter 0