CLAIMSET (A53_CTI_3) Register Description
| Register Name | CLAIMSET |
|---|---|
| Offset Address | 0x0000000FA0 |
| Absolute Address | 0x00FEF20FA0 (CORESIGHT_A53_CTI_3) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x0000000F |
| Description | CTI Claim Set |
CLAIMSET (A53_CTI_3) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| CLAIM_x | 31:0 | rwNormal read/write | 0xF | CLAIM tag set bit. If x is greater than or equal to the IMPLEMENTATION DEFINED number of CLAIM tags, this bit is RAZ/SBZ. Software can rely on these bits reading as zero, and must use a should-be-zero policy on writes. Implementations must ignore writes.Otherwise, the bit is RAO and the behavior on writes is:A single write to CTICLAIMSET can set multiple tags to 1. |