DIRM_5 (GPIO) Register Description
| Register Name | DIRM_5 |
|---|---|
| Offset Address | 0x0000000344 |
| Absolute Address | 0x00FF0A0344 (GPIO) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Direction mode (GPIO Bank5, EMIO Bank2) |
This register operates in exactly the same manner as DIRM_0, except that it reflects bank5, which corresponds to EMIO[95:64].
DIRM_5 (GPIO) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| DIRECTION_5 | 31:0 | rwNormal read/write | 0x0 | Direction mode 0: input 1: output Each bit configures the corresponding pin within the 32-bit bank |