APM3_TRG (VCU_SLCR) Register Description
| Register Name | APM3_TRG |
|---|---|
| Offset Address | 0x0000000408 |
| Absolute Address | 0x00A0040408 (VCU_SLCR) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | APM3_TRG |
APM3_TRG (VCU_SLCR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:1 | razRead as zero | 0x0 | reserved |
| start_stop | 0 | rwNormal read/write | 0x0 | 1: define the active operating window in case of Mode 1. Rising edge(Updating this register from 0 to 1) and falling edge (Updating this register from 1 to 0) will be used as start and stop trigger for operating timing mode 2. |