DEPCMD_3 (USB3_XHCI) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DEPCMD_3 (USB3_XHCI) Register Description

Register NameDEPCMD_3
Offset Address0x000000C83C
Absolute Address 0x00FE20C83C (USB3_0_XHCI)
0x00FE30C83C (USB3_1_XHCI)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionDevice Physical Endpoint-n Command Register
This register enables software to issue physical endpoint-specific commands. This register contains command, control, and status fields relevant to the current generic command, while the DEPCMDPAR[2:0]n registers provide command parameters and return status information.
Several fields (including Command Type) are write-only, so their read values are undefined. After power-on, prior to issuing the first endpoint command, the read value of this register is undefined. In particular, the CmdAct bit may be set after power-on. In this case, it is safe to issue an endpoint command. Instance 3 of an array of 12.

DEPCMD_3 (USB3_XHCI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
COMMANDPARAM31:16rwNormal read/write0x0Command Parameters or Event Parameters
Command Parameters (CommandParam), when this register is written:
For Start Transfer command:
-
[31:16]: StreamID. The USB StreamID assigned to this transfer
For Start Transfer command applied to an isochronous endpoint
- [31:16]: StartMicroFramNum: Indicates the (micro)frame number to which the first TRB applies.
For Update Transfer, End Transfer, and Start New Configuration commands
- [22:16]: Transfer Resource Index (XferRscIdx). The hardware-assigned transfer resource index for the transfer, which was returned in response to the Start Transfer command. The application software-assigned transfer resource index for a Start New Configuration command.
Event Parameters (EventParam), when this register is read.
CMDSTATUS15:12rwNormal read/write0x0Command Completion Status (CmdStatus)
Additional information about the completion of this command is available in this field. The information is in the same format as bits 15:12 of the Endpoint Command Complete event
HIPRI_FORCERM11rwNormal read/write0x0HighPriority/ForceRM (HiPri_ForceRM)
- HighPriority: Only valid for Start Transfer command
- ForceRM: Only valid for End Transfer command
- ClearPendIN: Only valid for Clear Stall command. Software sets this bit to clear any pending IN transaction (on that endpoint) stuck at the lower layers when a Clear Stall command is issued.
CMDACT10rwNormal read/write0x0Command Active (CmdAct)
Software sets this bit to 1 to enable the device endpoint controller to execute the generic command.
The device controller sets this bit to 0 when the CmdStatus field is valid and the endpoint is ready to accept another command. This does not imply that all the effects of the previously-issued command have taken place.
Reserved 9roRead-only0x0Reserved
CMDIOC 8rwNormal read/write0x0CMDIOC
Command Interrupt on Complete (CmdIOC)
When this bit is set, the device controller issues a generic Endpoint Command Complete event after executing the command.
Note that this interrupt is mapped to DEPCFG.IntrNum.
When the DEPCFG command is executed, the command interrupt on completion goes to the interrupt pointed by the DEPCFG.IntrNum in the current command.
Note: This field must not set to 1 if the DCTL.RunStop field is 0.
Reserved 7:4roRead-only0x0Reserved
CMDTYP 3:0rwNormal read/write0x0Command Type
Specifies the type of command the software driver is requesting the core to perform.
- 00h: Reserved
- 01h: Set Endpoint Configuration - -64 or 96-bit Parameter
- 02h: Set Endpoint Transfer Resource Configuration - 32-bit Parameter
- 03h: Get Endpoint State - No Parameter Needed
- 04h: Set Stall - No Parameter Needed
- 05h: Clear Stall (see Set Stall) - No Parameter Needed
- 06h: Start Transfer - 64-bit Parameter
- 07h: Update Transfer - No Parameter Needed
- 08h: End Transfer - No Parameter Needed
- 09h: Start New Configuration - No Parameter Needed