ATTR_48 (PCIE_ATTRIB) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ATTR_48 (PCIE_ATTRIB) Register Description

Register NameATTR_48
Offset Address0x00000000C0
Absolute Address 0x00FD4800C0 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00000003
DescriptionATTR_48

This register should only be written to during reset of the PCIe block

ATTR_48 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_msix_cap_table_size10:0rwNormal read/write0x3MSI-X Table Size. This value is transferred to the MSI-X Message Control[10:0] field. Set to 0 if MSI-X is not enabled. Note that the core does not implement the table; that must be implemented in user logic.