reg_timeoutcontrol (SDIO) Register Description
| Register Name | reg_timeoutcontrol |
|---|---|
| Offset Address | 0x000000002E |
| Absolute Address |
0x00FF16002E (SD0) 0x00FF17002E (SD1) |
| Width | 8 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Set the Data Timeout Counter Value. |
reg_timeoutcontrol (SDIO) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| timeout_ctrvalue | 3:0 | rwNormal read/write | 0x0 | This value determines the interval by which DAT line time-outs are detected. Refer to the Data Time-out Error in the Error Interrupt Status register for information on factors that dictate time-out generation. Time-out clock frequency will be generated by dividing the sdclockTMCLK by this value. When setting this register, prevent inadvertent time-out events by clearing the Data Time-out Error Status Enable (in the Error Interrupt Status Enable register). 1111 - Reserved 1110 - TMCLK * 2^27 -------------------- -------------------- 0001 - TMCLK * 2^14 0000 - TMCLK * 2^13 |