CLKMON_ENABLE (CRL_APB) Register Description
| Register Name | CLKMON_ENABLE |
| Offset Address | 0x0000000148 |
| Absolute Address |
0x00FF5E0148 (CRL_APB)
|
| Width | 16 |
| Type | woWrite-only |
| Reset Value | 0x00000000 |
| Description | Clock Monitor Interrupt Enable. |
A write of to this location will unmask the interrupt: CLKMON_MASK set = 0.
CLKMON_ENABLE (CRL_APB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
| cnta7_over_err | 15 | woWrite-only | 0x0 | Enable for clk_check |
| mon7_err | 14 | woWrite-only | 0x0 | Enable for clk_check |
| cnta6_over_err | 13 | woWrite-only | 0x0 | Enable for clk_check |
| mon6_err | 12 | woWrite-only | 0x0 | Enable for clk_check |
| cnta5_over_err | 11 | woWrite-only | 0x0 | Enable for clk_check |
| mon5_err | 10 | woWrite-only | 0x0 | Enable for clk_check |
| cnta4_over_err | 9 | woWrite-only | 0x0 | Enable for clk_check |
| mon4_err | 8 | woWrite-only | 0x0 | Enable for clk_check |
| cnta3_over_err | 7 | woWrite-only | 0x0 | Enable for clk_check |
| mon3_err | 6 | woWrite-only | 0x0 | Enable for clk_check |
| cnta2_over_err | 5 | woWrite-only | 0x0 | Enable for clk_check |
| mon2_err | 4 | woWrite-only | 0x0 | Enable for clk_check |
| cnta1_over_err | 3 | woWrite-only | 0x0 | Enable for clk_check |
| mon1_err | 2 | woWrite-only | 0x0 | Enable for clk_check |
| cnta0_over_err | 1 | woWrite-only | 0x0 | Enable for clk_check |
| mon0_err | 0 | woWrite-only | 0x0 | Enable for clk_check |