PCMDC (SATA_AHCI_VENDOR) Register Description
| Register Name | PCMDC |
|---|
| Offset Address | 0x0000000044 |
|---|
| Absolute Address |
0x00FD0C00E4 (SATA_AHCI_VENDOR)
|
|---|
| Width | 32 |
|---|
| Type | mixedMixed types. See bit-field details. |
|---|
| Reset Value | 0x00000000 |
|---|
| Description | Port CmdConfig |
|---|
Controls the operation of the Command Layer for either Port 0 or Port 1. The Port monitored is controlled by the value programmed into the Port Config Register.
PCMDC (SATA_AHCI_VENDOR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| Reserved | 31:30 | roRead-only | 0x0 | Reserved |
| TSVIE | 29 | rwNormal read/write | 0x0 | Trustzone Slave ID violation interrupt Enable (TSVIE): The interrupt will be seen on Interrupt status bit 3 in the general register group. |
| TSVI | 28 | wtcReadable, write a 1 to clear | 0x0 | Trustzone Slave ID violation interrupt (TSVI) |
| TSVT | 27:12 | roRead-only | 0x0 | Trustzone Slave ID of violating transaction (TSVT): When the Slave Port rejects a read or write as Slave Error due to security violation, this register records the AXI ID of the violating transaction. |
| Reserved | 11:2 | roRead-only | 0x0 | Reserved |
| ETLL | 1 | rwNormal read/write | 0x0 | Enable Transport Layer Loopback (ETLL) |
| ETLLB | 0 | rwNormal read/write | 0x0 | Enable Transport Layer Loopback in the BIST L Mode (ETLLB) |