L2_CE_CNTRL (PMU_LOCAL) Register Description
| Register Name | L2_CE_CNTRL |
|---|
| Offset Address | 0x00000000B8 |
|---|
| Absolute Address |
0x00FFD600B8 (PMU_LOCAL)
|
|---|
| Width | 32 |
|---|
| Type | mixedMixed types. See bit-field details. |
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| Reset Value | 0x00000001 |
|---|
| Description | L2 Cache Memory Chip Enables. Reset only by POR. |
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Chip Enable control signals. 0: disable memory. 1: enable memory. All fields can be read or written only by the PMU processor. This register maintains its contents during a System Reset.
L2_CE_CNTRL (PMU_LOCAL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| Reserved | 31:1 | roRead-only | 0x0 | reserved |
| Bank0 | 0 | rwNormal read/write | 0x1 | L2 Cache chip enable control. |