| Register Name | Offset Address | Width | Type | Reset Value | Description |
| Config | 0x0000000000 | 32 | mixedMixed types. See bit-field details. | 0x00020000 | SPI configuration |
| ISR | 0x0000000004 | 32 | mixedMixed types. See bit-field details. | 0x00000004 | SPI interrupt status |
| IER | 0x0000000008 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Enable |
| IDR | 0x000000000C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt disable |
| IMR | 0x0000000010 | 32 | roRead-only | 0x00000000 | Interrupt mask |
| Enable | 0x0000000014 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | SPI_Enable |
| Delay | 0x0000000018 | 32 | rwNormal read/write | 0x00000000 | Clock Delay |
| Tx_data | 0x000000001C | 32 | woWrite-only | 0x00000000 | Transmit Data. |
| Rx_data | 0x0000000020 | 32 | roRead-only | 0x00000000 | Receive Data |
| Slave_Idle_count | 0x0000000024 | 32 | mixedMixed types. See bit-field details. | 0x000000FF | Slave Idle Count |
| TX_thres | 0x0000000028 | 32 | rwNormal read/write | 0x00000001 | TX FIFO Threshold |
| RX_thres | 0x000000002C | 32 | rwNormal read/write | 0x00000001 | RX FIFO Threshold |
| Mod_id | 0x00000000FC | 32 | roRead-only | 0x00090108 | Module ID |