L1_TX_ANA_TM_118 (SERDES) Register Description
| Register Name | L1_TX_ANA_TM_118 |
|---|---|
| Offset Address | 0x00000041D8 |
| Absolute Address | 0x00FD4041D8 (SERDES) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Register value is generated by Vivado PCW. |
L1_TX_ANA_TM_118 (SERDES) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| TX_ANA_TM_118_31_8_rsvd | 31:8 | roRead-only | 0x0 | Value generated by PCW. |
| ana_byp30_7_4_rsvd | 7:4 | roRead-only | 0x0 | Value generated by PCW. |
| force_TX_Deemph_17_12 | 3 | rwNormal read/write | 0x0 | Value generated by PCW. |
| force_TX_Deemph_11_6 | 2 | rwNormal read/write | 0x0 | Value generated by PCW. |
| force_TX_Deemph_5_0 | 1 | rwNormal read/write | 0x0 | Value generated by PCW. |
| force_TX_Deemph_17_0 | 0 | rwNormal read/write | 0x0 | Value generated by PCW. |