PP1_MMU_PAGE_FAULT_ADDR (GPU) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

PP1_MMU_PAGE_FAULT_ADDR (GPU) Register Description

Register NamePP1_MMU_PAGE_FAULT_ADDR
Offset Address0x000000500C
Absolute Address 0x00FD4B500C (GPU)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionMMU Logical Address

PP1_MMU_PAGE_FAULT_ADDR (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
MMU_PAGE_FAULT_ADDR31:0roRead-only0x0Address of last page fault