PORTHLPMC_20 (USB3_XHCI) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

PORTHLPMC_20 (USB3_XHCI) Register Description

Register NamePORTHLPMC_20
Offset Address0x000000042C
Absolute Address 0x00FE20042C (USB3_0_XHCI)
0x00FE30042C (USB3_1_XHCI)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionUSB2 Port Hardware LPM Control Register Bit Definitions
For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0.

PORTHLPMC_20 (USB3_XHCI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:14roRead-only0x0Reserved
For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0.
HIRDD13:10rwNormal read/write0PORTHLPMC_20 HIRDD
L1_TIMEOUT 9:2rwNormal read/write0PORTHLPMC_20 L1_TIMEOUT.
For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0.
HIRDM 1:0rwNormal read/write0Host Initiated Resume Duration Mode (HIRDM)
- RWS. Default = 0h.
Indicates which HIRD value must be used.
The following are permissible values:
Value Description
0
Initiate L1 using HIRD only on timeout.
(default)
1
Initiate L1 using HIRDD on timeout.
If rejected by device, initiate L1 using HIRD.
3-2
Reserved.