enable_ic_type (PL390) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

enable_ic_type (PL390) Register Description

Register Nameenable_ic_type
Offset Address0x0000000004
Absolute Address 0x00F9000004 (RCPU_GIC)
Width32
TyperoRead-only
Reset Value0x0000F805
DescriptionProvides information about the configuration of the GIC.

enable_ic_type (PL390) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
LSPI15:11roRead-only0x1FReturns the number of Lockable Shared Peripheral Interrupts
(LSPIs) that the GIC contains. Read as:
b00000 = no LSPIs,
b00001 = 1 LSPI. INTID32,
b00010 = 2 LSPIs, INTID32 - INTID33,
b00011 = 3 LSPIs, INTID32 - INTID34,
..,
b11110 = 30 LSPIs, INTID32 - INTID61,
b11111 = 31 LSPIs, INTID32 - INTID62.
When CFGSDISABLE is HIGH then the GIC prevents writes to any
register locations that control the operating state of an LSPI
that is programmed to be secure.
TZ10roRead-only0x0Returns the number of security states that the GIC supports.
CPU_number 7:5roRead-only0x0Returns the number of CPU Interfaces that the GIC provides.
IT_lines_number 4:0roRead-only0x5Returns the number of INTIDs, to the nearest 32, that the
Distributor provides.
Read as:
b00000 = the Distributor provides 1-32 INTIDs,
b00001 = the Distributor provides 33-64 INTIDs,
b00010 = the Distributor provides 63-96 INTIDs,
b00011 = the Distributor provides 97-128 INTIDs,
..,
b11110 = the Distributor provides 961-992 INTIDs,
b11111 = the Distributor provides 993-1020 INTIDs.