PP0_MMU_INT_CLEAR (GPU) Register Description
| Register Name | PP0_MMU_INT_CLEAR |
|---|---|
| Offset Address | 0x0000004018 |
| Absolute Address | 0x00FD4B4018 (GPU) |
| Width | 32 |
| Type | woWrite-only |
| Reset Value | 0x00000000 |
| Description | MMU Interrupt Clear Register |
PP0_MMU_INT_CLEAR (GPU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:2 | woWrite-only | 0x0 | Reserved, read undefined, write as zero |
| read_bus_error | 1 | woWrite-only | 0x0 | Read bus error |
| page_fault | 0 | woWrite-only | 0x0 | Page fault |