GICP4_IRQ_TRIGGER (LPD_SLCR) Register Description
Register Name | GICP4_IRQ_TRIGGER |
---|---|
Offset Address | 0x0000008060 |
Absolute Address | 0x00FF418060 (LPD_SLCR) |
Width | 32 |
Type | woWrite-only |
Reset Value | 0x00000000 |
Description | Interrupt Trigger Register. A write of one to this location will set the interrupt status register related to this interrupt. |
GICP4_IRQ_TRIGGER (LPD_SLCR) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
src27 | 27 | woWrite-only | 0x0 | SMMU (from int_fpd) |
src26 | 26 | woWrite-only | 0x0 | CCI (From int_fpd) |
src25 | 25 | woWrite-only | 0x0 | REGS |
src24 | 24 | woWrite-only | 0x0 | EXTERR |
src23 | 23 | woWrite-only | 0x0 | EXT ERR |
src22 | 22 | woWrite-only | 0x0 | L2 Error |
src21 | 21 | woWrite-only | 0x0 | L2 Error |
src20 | 20 | woWrite-only | 0x0 | L2 Error |
src19 | 19 | woWrite-only | 0x0 | L2 Error |
src18 | 18 | woWrite-only | 0x0 | Performance Monitor Unit |
src17 | 17 | woWrite-only | 0x0 | Performance Monitor Unit |
src16 | 16 | woWrite-only | 0x0 | Performance Monitor Unit |
src15 | 15 | woWrite-only | 0x0 | Performance Monitor Unit |
src14 | 14 | woWrite-only | 0x0 | CTI |
src13 | 13 | woWrite-only | 0x0 | CTI |
src12 | 12 | woWrite-only | 0x0 | CTI |
src11 | 11 | woWrite-only | 0x0 | CTI |
src10 | 10 | woWrite-only | 0x0 | VCPUMT |
src9 | 9 | woWrite-only | 0x0 | VCPUMT |
src8 | 8 | woWrite-only | 0x0 | VCPUMT |
src7 | 7 | woWrite-only | 0x0 | VCPUMT |
src6 | 6 | woWrite-only | 0x0 | XMPU error interrupt for all of FPD |
src5 | 5 | woWrite-only | 0x0 | SATA controller interrupt |
src4 | 4 | woWrite-only | 0x0 | GPU interrupts |
src3 | 3 | woWrite-only | 0x0 | FPD DMA interrupt for channel 7 |
src2 | 2 | woWrite-only | 0x0 | FPD DMA interrupt for channel 6 |
src1 | 1 | woWrite-only | 0x0 | FPD DMA interrupt for channel 5 |
src0 | 0 | woWrite-only | 0x0 | FPD DMA interrupt for channel 4 (GDMA) |