IMR_0 (AMS) Register Description
| Register Name | IMR_0 |
|---|
| Offset Address | 0x0000000018 |
|---|
| Absolute Address |
0x00FFA50018 (AMS_CTRL)
|
|---|
| Width | 32 |
|---|
| Type | roRead-only |
|---|
| Reset Value | 0xFFFFFFFF |
|---|
| Description | Interrupt Mask, Reg 0. |
|---|
Read-only. 0: enabled. 1: masked (disabled). If the ISR bit = 1 (asserted interrupt) and the IMR bit = 0 (not masked), then the IRQ to the ADC SysMon controller is asserted. Software checks the ISR to determine the cause of the interrupt.
IMR_0 (AMS) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| pl_alm_15 | 31 | roRead-only | 0x1 | PL Sensor Alarms -- OR of bits [29:16]. |
| pl_alm_14 | 30 | roRead-only | 0x1 | reserved |
| pl_alm_13 | 29 | roRead-only | 0x1 | reserved |
| pl_alm_12 | 28 | roRead-only | 0x1 | PL ADC voltage, VCCADC. |
| pl_alm_11 | 27 | roRead-only | 0x1 | PL VUser3. |
| pl_alm_10 | 26 | roRead-only | 0x1 | PL VUser2. |
| pl_alm_9 | 25 | roRead-only | 0x1 | PL VUser1. |
| pl_alm_8 | 24 | roRead-only | 0x1 | PL VUser0. |
| pl_alm_7 | 23 | roRead-only | 0x1 | PL Sensor Alarms -- OR of bits [22:16]. |
| pl_alm_6 | 22 | roRead-only | 0x1 | VCCBRAM. |
| Reserved | 21 | roRead-only | 0x1 | Reserved |
| Reserved | 20 | roRead-only | 0x1 | Reserved |
| pl_alm_3 | 19 | roRead-only | 0x1 | PL VP_VN. |
| pl_alm_2 | 18 | roRead-only | 0x1 | PL VCCAUX. |
| pl_alm_1 | 17 | roRead-only | 0x1 | PL VCCIINT. |
| pl_alm_0 | 16 | roRead-only | 0x1 | PL temperature. |
| ps_alm_15 | 15 | roRead-only | 0x1 | PS Sensor Alarms -- OR of bits [13:0]. |
| ps_alm_14 | 14 | roRead-only | 0x1 | reserved |
| ps_alm_13 | 13 | roRead-only | 0x1 | FPD temperature. |
| ps_alm_12 | 12 | roRead-only | 0x1 | VCC_PSADC voltage. |
| ps_alm_11 | 11 | roRead-only | 0x1 | PS_MGTRAVTT voltage (supply10). |
| ps_alm_10 | 10 | roRead-only | 0x1 | PS_MGTRAVCC voltage (supply9). |
| ps_alm_9 | 9 | roRead-only | 0x1 | VCCO_PSIO2 I/O bank 502, MIO[52:77]. |
| ps_alm_8 | 8 | roRead-only | 0x1 | VCCO_PSIO1 I/O bank 501, MIO[26:51]. |
| ps_alm_7 | 7 | roRead-only | 0x1 | PS Sensor Alarms -- OR of bits [6:0]. |
| ps_alm_6 | 6 | roRead-only | 0x1 | VCCO_PSIO0 I/O bank 500, MIO[0:25]. |
| ps_alm_5 | 5 | roRead-only | 0x1 | VCCO_PSIO3 I/O bank 503, boot mode, serial config, JTAG, error output, error status, SRST, POR. |
| ps_alm_4 | 4 | roRead-only | 0x1 | VCCO_PSDDR, bank 504, DDR I/O. |
| ps_alm_3 | 3 | roRead-only | 0x1 | VCCO_PSAUX auxiliary power supply for BPU, eFuse, GPIOB logic. |
| ps_alm_2 | 2 | roRead-only | 0x1 | FPD internal voltage, VCC_PSINTFP. |
| ps_alm_1 | 1 | roRead-only | 0x1 | LPD internal voltage, VCC_PSINTLP. |
| ps_alm_0 | 0 | roRead-only | 0x1 | LPD temperature. |