PL390 Module - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID

UG1087

Release Date

2024-03-13

Revision

1.10

PL390 Module Description

Module Name	PL390 Module
Modules of this Type	RCPU_GIC
Base Addresses	0x00F9000000 (RCPU_GIC)
Description	RPU GIC Interrupt Controller

PL390 Module Register Summary

Register Name	Offset Address	Width	Type	Reset Value	Description
enable_enable	0x0000000000	32	rwNormal read/write	0x00000000	Interrupt Control Register (ICDICR)
enable_ic_type	0x0000000004	32	roRead-only	0x0000F805	Provides information about the configuration of the GIC.
enable_dist_ident	0x0000000008	32	roRead-only	0x0000043B	Provides information about the implementor of the Distributor and the revision of the GIC.
enable_sgi_security_if_n	0x0000000080	16	rwNormal read/write	0x00000000	Interrupt Security Registers (ICDISR)
enable_spi_security0	0x0000000084	32	rwNormal read/write	0x00000000	Interrupt Security Registers (ICDISR)
enable_spi_security1	0x0000000088	32	rwNormal read/write	0x00000000	Interrupt Security Registers (ICDISR)
enable_spi_security2	0x000000008C	32	rwNormal read/write	0x00000000	Interrupt Security Registers (ICDISR)
enable_spi_security3	0x0000000090	32	rwNormal read/write	0x00000000	Interrupt Security Registers (ICDISR)
enable_spi_security4	0x0000000094	32	rwNormal read/write	0x00000000	Interrupt Security Registers (ICDISR)
enable_spi_enable_set0	0x0000000104	32	rwNormal read/write	0x00000000	Interrupt Set-Enable Registers (ICDISER)
enable_spi_enable_set1	0x0000000108	32	rwNormal read/write	0x00000000	Interrupt Set-Enable Registers (ICDISER)
enable_spi_enable_set2	0x000000010C	32	rwNormal read/write	0x00000000	Interrupt Set-Enable Registers (ICDISER)
enable_spi_enable_set3	0x0000000110	32	rwNormal read/write	0x00000000	Interrupt Set-Enable Registers (ICDISER)
enable_spi_enable_set4	0x0000000114	32	rwNormal read/write	0x00000000	Interrupt Set-Enable Registers (ICDISER)
enable_spi_enable_clr0	0x0000000184	32	rwNormal read/write	0x00000000	Interrupt Clear-Enable Registers (ICDICER)
enable_spi_enable_clr1	0x0000000188	32	rwNormal read/write	0x00000000	Interrupt Clear-Enable Registers (ICDICER)
enable_spi_enable_clr2	0x000000018C	32	rwNormal read/write	0x00000000	Interrupt Clear-Enable Registers (ICDICER)
enable_spi_enable_clr3	0x0000000190	32	rwNormal read/write	0x00000000	Interrupt Clear-Enable Registers (ICDICER)
enable_spi_enable_clr4	0x0000000194	32	rwNormal read/write	0x00000000	Interrupt Clear-Enable Registers (ICDICER)
enable_sgi_pending_set_if_n	0x0000000200	16	roRead-only	0x00000000	Interrupt Set-Pending Registers (ICDISPR)
enable_spi_pending_set0	0x0000000204	32	rwNormal read/write	0x00000000	Interrupt Set-Pending Registers (ICDISPR)
enable_spi_pending_set1	0x0000000208	32	rwNormal read/write	0x00000000	Interrupt Set-Pending Registers (ICDISPR)
enable_spi_pending_set2	0x000000020C	32	rwNormal read/write	0x00000000	Interrupt Set-Pending Registers (ICDISPR)
enable_spi_pending_set3	0x0000000210	32	rwNormal read/write	0x00000000	Interrupt Set-Pending Registers (ICDISPR)
enable_spi_pending_set4	0x0000000214	32	rwNormal read/write	0x00000000	Interrupt Set-Pending Registers (ICDISPR)
enable_sgi_pending_clr_if_n	0x0000000280	16	roRead-only	0x00000000	Pending Clear Register (ICDICPR)
enable_spi_pending_clr0	0x0000000284	32	rwNormal read/write	0x00000000	Pending Clear Register (ICDICPR)
enable_spi_pending_clr1	0x0000000288	32	rwNormal read/write	0x00000000	Pending Clear Register (ICDICPR)
enable_spi_pending_clr2	0x000000028C	32	rwNormal read/write	0x00000000	Pending Clear Register (ICDICPR)
enable_spi_pending_clr3	0x0000000290	32	rwNormal read/write	0x00000000	Pending Clear Register (ICDICPR)
enable_spi_pending_clr4	0x0000000294	32	rwNormal read/write	0x00000000	Pending Clear Register (ICDICPR)
enable_sgi_active_if_n	0x0000000300	16	roRead-only	0x00000000	Active Bit Registers (ICDABR)
enable_spi_active0	0x0000000304	32	roRead-only	0x00000000	Active Bit Registers (ICDABR)
enable_spi_active1	0x0000000308	32	roRead-only	0x00000000	Active Bit Registers (ICDABR)
enable_spi_active2	0x000000030C	32	roRead-only	0x00000000	Active Bit Registers (ICDABR)
enable_spi_active3	0x0000000310	32	roRead-only	0x00000000	Active Bit Registers (ICDABR)
enable_spi_active4	0x0000000314	32	roRead-only	0x00000000	Active Bit Registers (ICDABR)
enable_priority_sgi_INTID_if_n0	0x0000000400	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n1	0x0000000401	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n2	0x0000000402	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n3	0x0000000403	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n4	0x0000000404	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n5	0x0000000405	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n6	0x0000000406	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n7	0x0000000407	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n8	0x0000000408	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n9	0x0000000409	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n10	0x000000040A	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n11	0x000000040B	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n12	0x000000040C	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n13	0x000000040D	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n14	0x000000040E	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_sgi_INTID_if_n15	0x000000040F	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID0	0x0000000420	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID1	0x0000000421	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID2	0x0000000422	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID3	0x0000000423	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID4	0x0000000424	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID5	0x0000000425	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID6	0x0000000426	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID7	0x0000000427	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID8	0x0000000428	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID9	0x0000000429	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID10	0x000000042A	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID11	0x000000042B	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID12	0x000000042C	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID13	0x000000042D	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID14	0x000000042E	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID15	0x000000042F	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID16	0x0000000430	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID17	0x0000000431	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID18	0x0000000432	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID19	0x0000000433	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID20	0x0000000434	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID21	0x0000000435	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID22	0x0000000436	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID23	0x0000000437	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID24	0x0000000438	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID25	0x0000000439	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID26	0x000000043A	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID27	0x000000043B	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID28	0x000000043C	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID29	0x000000043D	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID30	0x000000043E	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID31	0x000000043F	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID32	0x0000000440	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID33	0x0000000441	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID34	0x0000000442	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID35	0x0000000443	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID36	0x0000000444	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID37	0x0000000445	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID38	0x0000000446	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID39	0x0000000447	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID40	0x0000000448	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID41	0x0000000449	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID42	0x000000044A	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID43	0x000000044B	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID44	0x000000044C	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID45	0x000000044D	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID46	0x000000044E	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID47	0x000000044F	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID48	0x0000000450	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID49	0x0000000451	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID50	0x0000000452	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID51	0x0000000453	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID52	0x0000000454	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID53	0x0000000455	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID54	0x0000000456	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID55	0x0000000457	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID56	0x0000000458	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID57	0x0000000459	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID58	0x000000045A	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID59	0x000000045B	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID60	0x000000045C	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID61	0x000000045D	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID62	0x000000045E	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID63	0x000000045F	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID64	0x0000000460	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID65	0x0000000461	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID66	0x0000000462	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID67	0x0000000463	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID68	0x0000000464	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID69	0x0000000465	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID70	0x0000000466	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID71	0x0000000467	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID72	0x0000000468	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID73	0x0000000469	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID74	0x000000046A	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID75	0x000000046B	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID76	0x000000046C	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID77	0x000000046D	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID78	0x000000046E	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID79	0x000000046F	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID80	0x0000000470	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID81	0x0000000471	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID82	0x0000000472	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID83	0x0000000473	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID84	0x0000000474	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID85	0x0000000475	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID86	0x0000000476	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID87	0x0000000477	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID88	0x0000000478	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID89	0x0000000479	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID90	0x000000047A	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID91	0x000000047B	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID92	0x000000047C	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID93	0x000000047D	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID94	0x000000047E	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID95	0x000000047F	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID96	0x0000000480	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID97	0x0000000481	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID98	0x0000000482	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID99	0x0000000483	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID100	0x0000000484	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID101	0x0000000485	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID102	0x0000000486	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID103	0x0000000487	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID104	0x0000000488	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID105	0x0000000489	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID106	0x000000048A	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID107	0x000000048B	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID108	0x000000048C	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID109	0x000000048D	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID110	0x000000048E	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID111	0x000000048F	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID112	0x0000000490	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID113	0x0000000491	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID114	0x0000000492	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID115	0x0000000493	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID116	0x0000000494	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID117	0x0000000495	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID118	0x0000000496	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID119	0x0000000497	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID120	0x0000000498	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID121	0x0000000499	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID122	0x000000049A	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID123	0x000000049B	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID124	0x000000049C	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID125	0x000000049D	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID126	0x000000049E	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID127	0x000000049F	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID128	0x00000004A0	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID129	0x00000004A1	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID130	0x00000004A2	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID131	0x00000004A3	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID132	0x00000004A4	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID133	0x00000004A5	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID134	0x00000004A6	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID135	0x00000004A7	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID136	0x00000004A8	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID137	0x00000004A9	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID138	0x00000004AA	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID139	0x00000004AB	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID140	0x00000004AC	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID141	0x00000004AD	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID142	0x00000004AE	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID143	0x00000004AF	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID144	0x00000004B0	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID145	0x00000004B1	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID146	0x00000004B2	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID147	0x00000004B3	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID148	0x00000004B4	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID149	0x00000004B5	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID150	0x00000004B6	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID151	0x00000004B7	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID152	0x00000004B8	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID153	0x00000004B9	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID154	0x00000004BA	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID155	0x00000004BB	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID156	0x00000004BC	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID157	0x00000004BD	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID158	0x00000004BE	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_priority_spi_INTID159	0x00000004BF	8	rwNormal read/write	0x00000000	Interrupt Priority Registers (ICDIPR)
enable_targets_spi_INTID0	0x0000000820	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID1	0x0000000821	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID2	0x0000000822	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID3	0x0000000823	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID4	0x0000000824	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID5	0x0000000825	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID6	0x0000000826	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID7	0x0000000827	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID8	0x0000000828	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID9	0x0000000829	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID10	0x000000082A	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID11	0x000000082B	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID12	0x000000082C	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID13	0x000000082D	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID14	0x000000082E	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID15	0x000000082F	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID16	0x0000000830	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID17	0x0000000831	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID18	0x0000000832	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID19	0x0000000833	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID20	0x0000000834	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID21	0x0000000835	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID22	0x0000000836	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID23	0x0000000837	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID24	0x0000000838	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID25	0x0000000839	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID26	0x000000083A	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID27	0x000000083B	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID28	0x000000083C	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID29	0x000000083D	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID30	0x000000083E	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID31	0x000000083F	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID32	0x0000000840	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID33	0x0000000841	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID34	0x0000000842	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID35	0x0000000843	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID36	0x0000000844	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID37	0x0000000845	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID38	0x0000000846	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID39	0x0000000847	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID40	0x0000000848	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID41	0x0000000849	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID42	0x000000084A	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID43	0x000000084B	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID44	0x000000084C	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID45	0x000000084D	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID46	0x000000084E	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID47	0x000000084F	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID48	0x0000000850	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID49	0x0000000851	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID50	0x0000000852	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID51	0x0000000853	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID52	0x0000000854	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID53	0x0000000855	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID54	0x0000000856	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID55	0x0000000857	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID56	0x0000000858	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID57	0x0000000859	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID58	0x000000085A	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID59	0x000000085B	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID60	0x000000085C	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID61	0x000000085D	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID62	0x000000085E	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID63	0x000000085F	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID64	0x0000000860	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID65	0x0000000861	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID66	0x0000000862	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID67	0x0000000863	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID68	0x0000000864	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID69	0x0000000865	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID70	0x0000000866	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID71	0x0000000867	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID72	0x0000000868	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID73	0x0000000869	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID74	0x000000086A	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID75	0x000000086B	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID76	0x000000086C	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID77	0x000000086D	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID78	0x000000086E	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID79	0x000000086F	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID80	0x0000000870	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID81	0x0000000871	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID82	0x0000000872	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID83	0x0000000873	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID84	0x0000000874	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID85	0x0000000875	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID86	0x0000000876	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID87	0x0000000877	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID88	0x0000000878	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID89	0x0000000879	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID90	0x000000087A	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID91	0x000000087B	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID92	0x000000087C	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID93	0x000000087D	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID94	0x000000087E	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID95	0x000000087F	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID96	0x0000000880	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID97	0x0000000881	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID98	0x0000000882	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID99	0x0000000883	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID100	0x0000000884	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID101	0x0000000885	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID102	0x0000000886	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID103	0x0000000887	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID104	0x0000000888	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID105	0x0000000889	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID106	0x000000088A	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID107	0x000000088B	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID108	0x000000088C	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID109	0x000000088D	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID110	0x000000088E	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID111	0x000000088F	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID112	0x0000000890	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID113	0x0000000891	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID114	0x0000000892	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID115	0x0000000893	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID116	0x0000000894	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID117	0x0000000895	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID118	0x0000000896	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID119	0x0000000897	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID120	0x0000000898	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID121	0x0000000899	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID122	0x000000089A	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID123	0x000000089B	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID124	0x000000089C	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID125	0x000000089D	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID126	0x000000089E	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID127	0x000000089F	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID128	0x00000008A0	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID129	0x00000008A1	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID130	0x00000008A2	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID131	0x00000008A3	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID132	0x00000008A4	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID133	0x00000008A5	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID134	0x00000008A6	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID135	0x00000008A7	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID136	0x00000008A8	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID137	0x00000008A9	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID138	0x00000008AA	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID139	0x00000008AB	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID140	0x00000008AC	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID141	0x00000008AD	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID142	0x00000008AE	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID143	0x00000008AF	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID144	0x00000008B0	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID145	0x00000008B1	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID146	0x00000008B2	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID147	0x00000008B3	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID148	0x00000008B4	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID149	0x00000008B5	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID150	0x00000008B6	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID151	0x00000008B7	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID152	0x00000008B8	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID153	0x00000008B9	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID154	0x00000008BA	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID155	0x00000008BB	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID156	0x00000008BC	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID157	0x00000008BD	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID158	0x00000008BE	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_targets_spi_INTID159	0x00000008BF	8	rwNormal read/write	0x00000000	Interrupt Processor Targets Registers (ICDIPTR)
enable_spi_config0	0x0000000C08	32	rwNormal read/write	0x00000000	Interrupt Configuration Register (ICDICR)
enable_spi_config1	0x0000000C0C	32	rwNormal read/write	0x00000000	Interrupt Configuration Register (ICDICR)
enable_spi_config2	0x0000000C10	32	rwNormal read/write	0x00000000	Interrupt Configuration Register (ICDICR)
enable_spi_config3	0x0000000C14	32	rwNormal read/write	0x00000000	Interrupt Configuration Register (ICDICR)
enable_spi_config4	0x0000000C18	32	rwNormal read/write	0x00000000	Interrupt Configuration Register (ICDICR)
enable_spi	0x0000000D04	32	roRead-only	0x00000000	Each bit provides the status of the SPI[987:0] inputs.
enable_legacy_int_n	0x0000000DD4	32	roRead-only	0x00000000	Enables an external AMBA master to access the status of the: legacy_nirq_c<n> and legacy_nfiq_c<n> inputs for CPU Interface <n>, cfgsdisable tie-off signal.
enable_match_d_n	0x0000000DE0	32	roRead-only	0x00000000	Returns the status of the match_d<n> tie-off signals for CPU Interface <n>.
enable_enable_d_n	0x0000000DE4	32	roRead-only	0x00000000	Returns the status of the enable_d<n> tie-off signals for CPU Interface <n>.
enable_sgi_control	0x0000000F00	32	woWrite-only	0x00000000	Software Generated Interrupt Register (ICDSGIR)
enable_periph_id_8	0x0000000FC0	8	roRead-only	0x00000004	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
enable_periph_id_0	0x0000000FD0	8	roRead-only	0x00000090	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
enable_periph_id_1	0x0000000FD4	8	roRead-only	0x000000B3	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
enable_periph_id_2	0x0000000FD8	8	roRead-only	0x0000001B	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
enable_periph_id_3	0x0000000FDC	8	roRead-only	0x00000000	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
enable_periph_id_4	0x0000000FE0	8	roRead-only	0x00000004	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
enable_periph_id_5	0x0000000FE4	8	roRead-only	0x00000010	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
enable_periph_id_6	0x0000000FE8	8	roRead-only	0x00000000	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
enable_periph_id_7	0x0000000FEC	8	roRead-only	0x00000012	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
enable_component_id_0	0x0000000FF0	8	roRead-only	0x0000000D	The component_id_[3:0] Registers are four eight-bit wide registers, that can conceptually be treated as a single register that holds a 32-bit PrimeCell ID value.
enable_component_id_1	0x0000000FF4	8	roRead-only	0x000000F0	The component_id_[3:0] Registers are four eight-bit wide registers, that can conceptually be treated as a single register that holds a 32-bit PrimeCell ID value.
enable_component_id_2	0x0000000FF8	8	roRead-only	0x00000005	The component_id_[3:0] Registers are four eight-bit wide registers, that can conceptually be treated as a single register that holds a 32-bit PrimeCell ID value.
enable_component_id_3	0x0000000FFC	8	roRead-only	0x000000B1	The component_id_[3:0] Registers are four eight-bit wide registers, that can conceptually be treated as a single register that holds a 32-bit PrimeCell ID value.
control_n_control_n	0x0000001000	32	rwNormal read/write	0x00000000	CPU Interface Control Register (ICCICR)
control_n_pri_msk_c_n	0x0000001004	32	rwNormal read/write	0x00000000	Priority Mask Register (ICCIPMR)
control_n_bp_c_n	0x0000001008	32	rwNormal read/write	0x00000000	Binary Point Register (ICCBPR)
control_n_int_ack_n	0x000000100C	32	roRead-only	0x000003FF	Interrupt Acknowledge Register (ICCIAR)
control_n_eoi_n	0x0000001010	32	woWrite-only	0x00000000	End of Interrupt Register (ICCEOIR)
control_n_run_priority_n	0x0000001014	32	roRead-only	0x000000FF	Running Priority Register (ICCRPR)
control_n_hi_pend_n	0x0000001018	32	roRead-only	0x000003FF	Highest Pending Interrupt Register (ICCHPIR)
control_n_alias_nsbp_c_n	0x000000101C	32	rwNormal read/write	0x00000000	Aliased Binary Point Register (ICCABPR)
control_n_integ_en_c_n	0x0000001040	32	rwNormal read/write	0x00000000	Enables the integration test logic to modify the status of the nfiq_c<n> and nirq_c<n> signals.
control_n_interrupt_out_n	0x0000001044	32	rwNormal read/write	0x00000000	Enables the integration test logic to modify the status of the nfiq_c<n> and nirq_c<n> signals.
control_n_match_c_n	0x0000001050	32	roRead-only	0x00000000	Returns the status of the match_c<n> tie-off signals for CPU Interface <n>.
control_n_enable_c_n	0x0000001054	32	roRead-only	0x00000000	Returns the status of the enable_c<n> tie-off signals for CPU Interface <n>.
control_n_cpu_if_ident	0x00000010FC	32	roRead-only	0x3901043B	Returns the status of the enable_c<n> tie-off signals for CPU Interface <n>.
control_n_periph_id_8	0x0000001FC0	8	roRead-only	0x00000004	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
control_n_periph_id_0	0x0000001FD0	8	roRead-only	0x00000090	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
control_n_periph_id_1	0x0000001FD4	8	roRead-only	0x000000B3	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
control_n_periph_id_2	0x0000001FD8	8	roRead-only	0x0000001B	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
control_n_periph_id_3	0x0000001FDC	8	roRead-only	0x00000000	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
control_n_periph_id_4	0x0000001FE0	8	roRead-only	0x00000004	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
control_n_periph_id_5	0x0000001FE4	8	roRead-only	0x00000010	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
control_n_periph_id_6	0x0000001FE8	8	roRead-only	0x00000000	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
control_n_periph_id_7	0x0000001FEC	8	roRead-only	0x00000012	The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers.
control_n_component_id_0	0x0000001FF0	8	roRead-only	0x0000000D	The component_id_[3:0] Registers are four eight-bit wide registers, that can conceptually be treated as a single register that holds a 32-bit PrimeCell ID value.
control_n_component_id_1	0x0000001FF4	8	roRead-only	0x000000F0	The component_id_[3:0] Registers are four eight-bit wide registers, that can conceptually be treated as a single register that holds a 32-bit PrimeCell ID value.
control_n_component_id_2	0x0000001FF8	8	roRead-only	0x00000005	The component_id_[3:0] Registers are four eight-bit wide registers, that can conceptually be treated as a single register that holds a 32-bit PrimeCell ID value.
control_n_component_id_3	0x0000001FFC	8	roRead-only	0x000000B1	The component_id_[3:0] Registers are four eight-bit wide registers, that can conceptually be treated as a single register that holds a 32-bit PrimeCell ID value.