LOGCLR_TRIG (PMU_LOCAL) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

LOGCLR_TRIG (PMU_LOCAL) Register Description

Register NameLOGCLR_TRIG
Offset Address0x0000000350
Absolute Address 0x00FFD60350 (PMU_LOCAL)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionRequest to start the Logic Clear Engines.

0: no effect. 1: Start the Engine.

LOGCLR_TRIG (PMU_LOCAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:18woWrite-only0x0reserved
FP17woWrite-only0x0Logic Clear Req for FP Domain besides A9s, GPU
LP16woWrite-only0x0Logic Clear Req for LP Domain besides PMU, RPU, and USBs
Reserved15:14woWrite-only0x0reserved
USB113woWrite-only0x0Logic Clear Req for USB1
USB012woWrite-only0x0Logic Clear Req for USB0
Reserved11woWrite-only0x0reserved
RPU10woWrite-only0x0Logic Clear Req for Dual_R5
Reserved 9:8woWrite-only0x0reserved
PP1 7woWrite-only0x0Logic Clear Req for GPU PP1
PP0 6woWrite-only0x0Logic Clear Req for GPU PP0
Reserved 5:4woWrite-only0x0reserved
ACPU3 3woWrite-only0x0Logic Clear Req for ACPU3
ACPU2 2woWrite-only0x0Logic Clear Req for ACPU2
ACPU1 1woWrite-only0x0Logic Clear Req for ACPU1
ACPU0 0woWrite-only0x0Logic Clear Req for ACPU0