OCM_RET_CNTRL (PMU_LOCAL) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

OCM_RET_CNTRL (PMU_LOCAL) Register Description

Register NameOCM_RET_CNTRL
Offset Address0x00000000C4
Absolute Address 0x00FFD600C4 (PMU_LOCAL)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionOCM Memory Retention Controls. Reset only by POR.

Retention control signals. 0: active memory. 1: data retention mode. All fields can only be read or written by the PMU processor. This register maintains its contents during a System Reset.

OCM_RET_CNTRL (PMU_LOCAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:4roRead-only0x0reserved
Bank3 3rwNormal read/write0x0OCM Bank 3
Bank2 2rwNormal read/write0x0OCM Bank 2
Bank1 1rwNormal read/write0x0OCM Bank 1
Bank0 0rwNormal read/write0x0OCM Bank 0