ACPU_CTRL (CRF_APB) Register Description
| Register Name | ACPU_CTRL |
|---|---|
| Offset Address | 0x0000000060 |
| Absolute Address | 0x00FD1A0060 (CRF_APB) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x03000400 |
| Description | APU MPCore Clock Generator Control. |
Register is write protected by crf_apb.crf_wprot [active].
ACPU_CTRL (CRF_APB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| CLKACT_HALF | 25 | rwNormal read/write | 0x1 | Clock active control for half-speed APU Clock. 0: disable. Clock stop. 1: enable. |
| CLKACT_FULL | 24 | rwNormal read/write | 0x1 | Clock active control for full-speed APU Clock. 0: disable. Clock stop. 1: enable. |
| DIVISOR0 | 13:8 | rwNormal read/write | 0x4 | 6-bit divider. |
| SRCSEL | 2:0 | rwNormal read/write | 0x0 | Clock generator input source. 000: APLL 010: DPLL 011: VPLL |