SMMU_CBA2R10 (SMMU500) Register Description
| Register Name | SMMU_CBA2R10 |
|---|---|
| Offset Address | 0x0000001828 |
| Absolute Address | 0x00FD801828 (SMMU_GPV) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Extends the configuration attributes for the translation context bank that SMMU_CBARn specifies. |
SMMU_CBA2R10 (SMMU500) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| MONC | 1 | rwNormal read/write | 0x0 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
| VA64 | 0 | rwNormal read/write | 0x0 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |