DX4BDLR6 (DDR_PHY) Register Description
| Register Name | DX4BDLR6 |
|---|---|
| Offset Address | 0x0000000B60 |
| Absolute Address | 0x00FD080B60 (DDR_PHY) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | DATX8 n Bit Delay Line Register 6 |
DX4BDLR6 (DDR_PHY) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:22 | roRead-only | 0x0 | Return zeroes on reads. |
| TERBD | 21:16 | rwNormal read/write | 0x0 | Termination Enable Bit Delay: Delay select for the BDL. |
| Reserved | 15:14 | roRead-only | 0x0 | Return zeroes on reads. |
| PDRBD | 13:8 | rwNormal read/write | 0x0 | Power down receiver Bit Delay: Delay select for the BDL. |
| Reserved | 7:0 | roRead-only | 0x0 | Return zeroes on reads. |