Rcvr_FIFO_trigger_level (UART) Register Description
| Register Name | Rcvr_FIFO_trigger_level |
|---|---|
| Offset Address | 0x0000000020 |
| Absolute Address |
0x00FF000020 (UART0) 0x00FF010020 (UART1) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000020 |
| Description | Receiver FIFO Trigger Level Register |
The read/write Receiver FIFO Trigger Level Register is used to set the value at which the receiver FIFO triggers an interrupt event.
Rcvr_FIFO_trigger_level (UART) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:6 | roRead-only | 0x0 | Reserved, read as zero, ignored on write. |
| RTRIG | 5:0 | rwNormal read/write | 0x20 | Receiver FIFO trigger level value: 0: Disables receiver FIFO trigger level function 1 - 63:Trigger set when receiver FIFO fills to RTRIG bytes |