IR_ENABLE (CRL_APB) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

IR_ENABLE (CRL_APB) Register Description

Register NameIR_ENABLE
Offset Address0x000000000C
Absolute Address 0x00FF5E000C (CRL_APB)
Width 1
TypewoWrite-only
Reset Value0x00000000
DescriptionInterrupt Enable.

0: no effect. 1: enable interrupt (sets IR_MASK bit = 0). Write-only.

IR_ENABLE (CRL_APB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
addr_decode_err 0woWrite-only0x0Register Access Error on APB.