TCR (SATA_AHCI_VENDOR) Register Description
| Register Name | TCR |
|---|
| Offset Address | 0x0000000050 |
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| Absolute Address |
0x00FD0C00F0 (SATA_AHCI_VENDOR)
|
|---|
| Width | 32 |
|---|
| Type | mixedMixed types. See bit-field details. |
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| Reset Value | 0x00000100 |
|---|
| Description | Timer Control |
|---|
Controls the operation of the Timer Pre-scaler used to configure a 10us pulse generator used to control the operation of the Slumber and Dev Sleep timers. This pulse generator is used in both Port 0 and 1.
TCR (SATA_AHCI_VENDOR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| Reserved | 31:13 | roRead-only | 0x0 | Reserved |
| TPS | 12:0 | rwNormal read/write | 0x100 | Timer PreScalar value. (TPS) The system clock is divided by the ratio to generate a 10us clock pulse to run the port layers. |