ECCCADDR1 (DDRC) Register Description
| Register Name | ECCCADDR1 |
|---|---|
| Offset Address | 0x0000000088 |
| Absolute Address | 0x00FD070088 (DDRC) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | ECC Corrected Error Address Register 1 |
ECCCADDR1 (DDRC) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ecc_corr_bg | 25:24 | roRead-only | 0x0 | Bank Group number of a read resulting in a corrected ECC error |
| ecc_corr_bank | 18:16 | roRead-only | 0x0 | Bank number of a read resulting in a corrected ECC error |
| ecc_corr_col | 11:0 | roRead-only | 0x0 | Block number of a read resulting in a corrected ECC error (lowest bit not assigned here) 0: data beats 0 to 3. 4: data beats 4 to 7. |