DIRM_1 (GPIO) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DIRM_1 (GPIO) Register Description

Register NameDIRM_1
Offset Address0x0000000244
Absolute Address 0x00FF0A0244 (GPIO)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionDirection mode (GPIO Bank1, MIO)

This register operates in exactly the same manner as DIRM_0, except that it reflects bank1, which corresponds to MIO[51:26].

DIRM_1 (GPIO) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:26razRead as zero0x0Not used, read back as zero
DIRECTION_125:0rwNormal read/write0x0Direction mode
0: input
1: output
Each bit configures the corresponding pin within the 26-bit bank