INT_ANY_1 (GPIO) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

INT_ANY_1 (GPIO) Register Description

Register NameINT_ANY_1
Offset Address0x0000000264
Absolute Address 0x00FF0A0264 (GPIO)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionInterrupt Any Edge Sensitive (GPIO Bank1, MIO)

This register operates in exactly the same manner as INT_ANY_0, except that it reflects bank1, which corresponds to MIO[51:26].

INT_ANY_1 (GPIO) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:26razRead as zero0x0Not used, read back as zero
INT_ON_ANY_125:0rwNormal read/write0x0Interrupt edge triggering mode
0: trigger on single edge, using configured interrupt polarity
1: trigger on both edges
Each bit configures the corresponding pin within the 26-bit bank