L1_TM_E_ILL8 (SERDES) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

L1_TM_E_ILL8 (SERDES) Register Description

Register NameL1_TM_E_ILL8
Offset Address0x0000005940
Absolute Address 0x00FD405940 (SERDES)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionRegister value is generated by Vivado PCW.

L1_TM_E_ILL8 (SERDES) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
TM_E_ILL8_31_8_rsvd31:8roRead-only0x0Value generated by PCW.
ill_bypass_e_polytrim_val 7:0rwNormal read/write0x0Value generated by PCW.