TCR (CAN) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

TCR (CAN) Register Description

Register NameTCR
Offset Address0x0000000028
Absolute Address 0x00FF060028 (CAN0)
0x00FF070028 (CAN1)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionTimestamp Clear.

TCR (CAN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1rwNormal read/write0x0reserved
CTS 0woWrite-only0x0Clear Timestamp
Internal free running counter is cleared to 0 when CTS=1.
This bit only needs to be written once with a 1 to clear the counter.
The bit will automatically return to 0.