rsa_rd_addr (RSA_CORE) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

rsa_rd_addr (RSA_CORE) Register Description

Register Namersa_rd_addr
Offset Address0x000000000C
Absolute Address 0x00FFCE000C (RSA_CORE)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionRead Address

rsa_rd_addr (RSA_CORE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
rd_addr 6:0woWrite-only0x0Memory read address. A write to this register fetches a 192-bit word from the memory. Data in the RD_DATA regsiter will be available to read 4 clock cycles after the write into this register.