bank1_ctrl3 (IOU_SLCR) Register Description
| Register Name | bank1_ctrl3 |
|---|---|
| Offset Address | 0x000000015C |
| Absolute Address | 0x00FF18015C (IOU_SLCR) |
| Width | 26 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | MIO Bank 1, CMOS input type control. |
bank1_ctrl3 (IOU_SLCR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| schmitt_cmos_n | 25:0 | rwNormal read/write | 0x0 | Select between Schmitt Trigger or CMOS input for MIO pins [26:51]. 0 = CMOS. 1 = Schmitt (hysteresis). Bit [0] controls MIO pin 26. .. Bit [25] controls MIO pin 51. Bits [26] to [31] are reserved. |