GPIO Module - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID

UG1087

Release Date

2024-03-13

Revision

1.10

GPIO Module Description

Module Name	GPIO Module
Modules of this Type	GPIO
Base Addresses	0x00FF0A0000 (GPIO)
Description	General Purpose I/O Controller

GPIO Module Register Summary

Register Name	Offset Address	Width	Type	Reset Value	Description
MASK_DATA_0_LSW	0x0000000000	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank0, MIO, Lower 16bits)
MASK_DATA_0_MSW	0x0000000004	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank0, MIO, Upper 10bits)
MASK_DATA_1_LSW	0x0000000008	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank1, MIO, Lower 16bits)
MASK_DATA_1_MSW	0x000000000C	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank1, MIO, Upper 10 bits)
MASK_DATA_2_LSW	0x0000000010	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank2, MIO, Lower 16 bits)
MASK_DATA_2_MSW	0x0000000014	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank2, MIO, Upper 10 bits)
MASK_DATA_3_LSW	0x0000000018	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank3, EMIO, Lower 16bits)
MASK_DATA_3_MSW	0x000000001C	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank3, EMIO, Upper 16bits)
MASK_DATA_4_LSW	0x0000000020	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank4, EMIO, Lower 16bits)
MASK_DATA_4_MSW	0x0000000024	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank4, EMIO, Upper 16bits)
MASK_DATA_5_LSW	0x0000000028	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank5, EMIO, Lower 16bits)
MASK_DATA_5_MSW	0x000000002C	32	mixedMixed types. See bit-field details.	0x00000000	Maskable Output Data (GPIO Bank5, EMIO, Upper 16bits)
DATA_0	0x0000000040	32	mixedMixed types. See bit-field details.	0x00000000	Output Data (GPIO Bank0, MIO)
DATA_1	0x0000000044	32	mixedMixed types. See bit-field details.	0x00000000	Output Data (GPIO Bank1, MIO)
DATA_2	0x0000000048	32	mixedMixed types. See bit-field details.	0x00000000	Output Data (GPIO Bank2, MIO)
DATA_3	0x000000004C	32	rwNormal read/write	0x00000000	Output Data (GPIO Bank3, EMIO)
DATA_4	0x0000000050	32	rwNormal read/write	0x00000000	Output Data (GPIO Bank4, EMIO)
DATA_5	0x0000000054	32	rwNormal read/write	0x00000000	Output Data (GPIO Bank5, EMIO)
DATA_0_RO	0x0000000060	32	mixedMixed types. See bit-field details.	0x00000000	Input Data (GPIO Bank0, MIO)
DATA_1_RO	0x0000000064	32	mixedMixed types. See bit-field details.	0x00000000	Input Data (GPIO Bank1, MIO)
DATA_2_RO	0x0000000068	32	mixedMixed types. See bit-field details.	0x00000000	Input Data (GPIO Bank2, MIO)
DATA_3_RO	0x000000006C	32	roRead-only	0x00000000	Input Data (GPIO Bank3, EMIO)
DATA_4_RO	0x0000000070	32	roRead-only	0x00000000	Input Data (GPIO Bank4, EMIO)
DATA_5_RO	0x0000000074	32	roRead-only	0x00000000	Input Data (GPIO Bank5, EMIO)
DIRM_0	0x0000000204	32	mixedMixed types. See bit-field details.	0x00000000	Direction mode (GPIO Bank0, MIO)
OEN_0	0x0000000208	32	mixedMixed types. See bit-field details.	0x00000000	Output enable (GPIO Bank0, MIO)
INT_MASK_0	0x000000020C	32	mixedMixed types. See bit-field details.	0x03FFFFFF	Interrupt Mask Status (GPIO Bank0, MIO)
INT_EN_0	0x0000000210	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Enable/Unmask (GPIO Bank0, MIO)
INT_DIS_0	0x0000000214	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Disable/Mask (GPIO Bank0, MIO)
INT_STAT_0	0x0000000218	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Status (GPIO Bank0, MIO)
INT_TYPE_0	0x000000021C	32	mixedMixed types. See bit-field details.	0x03FFFFFF	Interrupt Type (GPIO Bank0, MIO)
INT_POLARITY_0	0x0000000220	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Polarity (GPIO Bank0, MIO)
INT_ANY_0	0x0000000224	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Any Edge Sensitive (GPIO Bank0, MIO)
DIRM_1	0x0000000244	32	mixedMixed types. See bit-field details.	0x00000000	Direction mode (GPIO Bank1, MIO)
OEN_1	0x0000000248	32	mixedMixed types. See bit-field details.	0x00000000	Output enable (GPIO Bank1, MIO)
INT_MASK_1	0x000000024C	32	mixedMixed types. See bit-field details.	0x03FFFFFF	Interrupt Mask Status (GPIO Bank1, MIO)
INT_EN_1	0x0000000250	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Enable/Unmask (GPIO Bank1, MIO)
INT_DIS_1	0x0000000254	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Disable/Mask (GPIO Bank1, MIO)
INT_STAT_1	0x0000000258	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Status (GPIO Bank1, MIO)
INT_TYPE_1	0x000000025C	32	mixedMixed types. See bit-field details.	0x03FFFFFF	Interrupt Type (GPIO Bank1, MIO)
INT_POLARITY_1	0x0000000260	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Polarity (GPIO Bank1, MIO)
INT_ANY_1	0x0000000264	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Any Edge Sensitive (GPIO Bank1, MIO)
DIRM_2	0x0000000284	32	mixedMixed types. See bit-field details.	0x00000000	Direction mode (GPIO Bank2, MIO)
OEN_2	0x0000000288	32	mixedMixed types. See bit-field details.	0x00000000	Output enable (GPIO Bank2, MIO)
INT_MASK_2	0x000000028C	32	mixedMixed types. See bit-field details.	0x03FFFFFF	Interrupt Mask Status (GPIO Bank2, MIO)
INT_EN_2	0x0000000290	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Enable/Unmask (GPIO Bank2, MIO)
INT_DIS_2	0x0000000294	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Disable/Mask (GPIO Bank2, MIO)
INT_STAT_2	0x0000000298	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Status (GPIO Bank2, MIO)
INT_TYPE_2	0x000000029C	32	mixedMixed types. See bit-field details.	0x03FFFFFF	Interrupt Type (GPIO Bank2, MIO)
INT_POLARITY_2	0x00000002A0	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Polarity (GPIO Bank2, MIO)
INT_ANY_2	0x00000002A4	32	mixedMixed types. See bit-field details.	0x00000000	Interrupt Any Edge Sensitive (GPIO Bank2, MIO)
DIRM_3	0x00000002C4	32	rwNormal read/write	0x00000000	Direction mode (GPIO Bank3, EMIO Bank0)
OEN_3	0x00000002C8	32	rwNormal read/write	0x00000000	Output enable (GPIO Bank3, EMIO Bank0)
INT_MASK_3	0x00000002CC	32	roRead-only	0xFFFFFFFF	Interrupt Mask Status (GPIO Bank3, EMIO Bank0)
INT_EN_3	0x00000002D0	32	woWrite-only	0x00000000	Interrupt Enable/Unmask (GPIO Bank3, EMIO Bank0)
INT_DIS_3	0x00000002D4	32	woWrite-only	0x00000000	Interrupt Disable/Mask (GPIO Bank3, EMIO Bank0)
INT_STAT_3	0x00000002D8	32	wtcReadable, write a 1 to clear	0x00000000	Interrupt Status (GPIO Bank3, EMIO Bank0)
INT_TYPE_3	0x00000002DC	32	rwNormal read/write	0xFFFFFFFF	Interrupt Type (GPIO Bank3, EMIO Bank0)
INT_POLARITY_3	0x00000002E0	32	rwNormal read/write	0x00000000	Interrupt Polarity (GPIO Bank3, EMIO Bank0)
INT_ANY_3	0x00000002E4	32	rwNormal read/write	0x00000000	Interrupt Any Edge Sensitive (GPIO Bank3, EMIO Bank0)
DIRM_4	0x0000000304	32	rwNormal read/write	0x00000000	Direction mode (GPIO Bank4, EMIO Bank1)
OEN_4	0x0000000308	32	rwNormal read/write	0x00000000	Output enable (GPIO Bank4, EMIO Bank1)
INT_MASK_4	0x000000030C	32	roRead-only	0xFFFFFFFF	Interrupt Mask Status (GPIO Bank4, EMIO Bank1)
INT_EN_4	0x0000000310	32	woWrite-only	0x00000000	Interrupt Enable/Unmask (GPIO Bank4, EMIO Bank1)
INT_DIS_4	0x0000000314	32	woWrite-only	0x00000000	Interrupt Disable/Mask (GPIO Bank4, EMIO Bank1)
INT_STAT_4	0x0000000318	32	wtcReadable, write a 1 to clear	0x00000000	Interrupt Status (GPIO Bank4, EMIO Bank1)
INT_TYPE_4	0x000000031C	32	rwNormal read/write	0xFFFFFFFF	Interrupt Type (GPIO Bank4, EMIO Bank1)
INT_POLARITY_4	0x0000000320	32	rwNormal read/write	0x00000000	Interrupt Polarity (GPIO Bank4, EMIO Bank1)
INT_ANY_4	0x0000000324	32	rwNormal read/write	0x00000000	Interrupt Any Edge Sensitive (GPIO Bank4, EMIO Bank1)
DIRM_5	0x0000000344	32	rwNormal read/write	0x00000000	Direction mode (GPIO Bank5, EMIO Bank2)
OEN_5	0x0000000348	32	rwNormal read/write	0x00000000	Output enable (GPIO Bank5, EMIO Bank2)
INT_MASK_5	0x000000034C	32	roRead-only	0xFFFFFFFF	Interrupt Mask Status (GPIO Bank5, EMIO Bank2)
INT_EN_5	0x0000000350	32	woWrite-only	0x00000000	Interrupt Enable/Unmask (GPIO Bank5, EMIO Bank2)
INT_DIS_5	0x0000000354	32	woWrite-only	0x00000000	Interrupt Disable/Mask (GPIO Bank5, EMIO Bank2)
INT_STAT_5	0x0000000358	32	wtcReadable, write a 1 to clear	0x00000000	Interrupt Status (GPIO Bank5, EMIO Bank2)
INT_TYPE_5	0x000000035C	32	rwNormal read/write	0xFFFFFFFF	Interrupt Type (GPIO Bank5, EMIO Bank2)
INT_POLARITY_5	0x0000000360	32	rwNormal read/write	0x00000000	Interrupt Polarity (GPIO Bank5, EMIO Bank2)
INT_ANY_5	0x0000000364	32	rwNormal read/write	0x00000000	Interrupt Any Edge Sensitive (GPIO Bank5, EMIO Bank2)