APERPERM_000 (XPPU) Register Description
| Register Name | APERPERM_000 |
|---|---|
| Offset Address | 0x0000001000 |
| Absolute Address | 0x00FF981000 (LPD_XPPU) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Aperture 000. IOP Reg 64KB page at 0xFF00_0000. |
Apertures 0 to 255 implement 64-kB page sizes for IOP register accesses. Apertures 256 to 383 (count of 128) implement 32B buffer sizes for IPI register accesses. Apertures 384 to 399 (count of 16) implement 1-MB page sizes for memory spaces in the IOP. Aperture 400 implements a single 512-MB page size for the QSPI linear address space. Note: Default value set by firmware
APERPERM_000 (XPPU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| PARITY | 31:28 | rwNormal read/write | 0 | Parity for bits in this register. Bit 28: [4:0]. Bit 29: [9:5]. Bit 30: [14:10]. Bit 31: [27], [19:15]. Note: Software calculates and writes these bits. |
| TRUSTZONE | 27 | rwNormal read/write | 0 | Security status requirement per TrustZone. 0: secure master only. 1: secure or non-secure master okay. |
| Reserved | 26:20 | roRead-only | 0x0 | reserved |
| PERMISSION | 19:0 | rwNormal read/write | 0 | Master ID Profile Permission. Each permission bit [19:0] corresponds to a MASTER_IDxx register. To allow a master to access this aperture, set the corresponding bit. 0: not allowed. 1: allowed. More than one bit can be set to permit more than one master to access the aperture. |