bank0_ctrl6 (IOU_SLCR) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

bank0_ctrl6 (IOU_SLCR) Register Description

Register Namebank0_ctrl6
Offset Address0x000000014C
Absolute Address 0x00FF18014C (IOU_SLCR)
Width26
TyperwNormal read/write
Reset Value0x00000000
DescriptionMIO Bank 0, Output slew rate select.

bank0_ctrl6 (IOU_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
slow_fast_slew_n25:0rwNormal read/write0x0Select between fast and slow output slew rates for MIO pins [0:25].
0 = fast slew rate.
1 = slow slew rate.
Bit [0] controls MIO pin 0.
..
Bit [25] controls MIO pin 25.
Bits [26] to [31] are reserved.