GHWPARAMS4 (USB3_XHCI) Register Description
| Register Name | GHWPARAMS4 |
|---|---|
| Offset Address | 0x000000C150 |
| Absolute Address |
0x00FE20C150 (USB3_0_XHCI) 0x00FE30C150 (USB3_1_XHCI) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x47822004 |
| Description | Global Hardware Parameter Register 4 |
GHWPARAMS4 (USB3_XHCI) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ghwparams4_31_28 | 31:28 | roRead-only | 0x4 | `DWC_USB3_BMU_LSP_DEPTH |
| ghwparams4_27_24 | 27:24 | roRead-only | 0x7 | `DWC_USB3_BMU_PTL_DEPTH-1 |
| ghwparams4_23 | 23 | roRead-only | 0x1 | `DWC_USB3_EN_ISOC_SUPT |
| ghwparams4_22 | 22 | roRead-only | 0x0 | Reserved |
| ghwparams4_21 | 21 | roRead-only | 0x0 | `DWC_USB3_EXT_BUFF_CONTROL |
| ghwparams4_20_17 | 20:17 | roRead-only | 0x1 | `DWC_USB3_NUM_SS_USB_INSTANCES |
| ghwparams4_16_13 | 16:13 | roRead-only | 0x1 | `DWC_USB3_HIBER_SCRATCHBUFS Number of external scratchpad buffers the core requires to save its internal state in the device mode. Each buffer is assumed to be 4KB. The scratchpad buffer array must have this many buffer pointers. |
| ghwparams4_12 | 12 | roRead-only | 0x0 | `DWC_USB3_EN_SSIC - 1b0: if DWC_USB3_EN_SSIC == 0 - 1b1: if DWC_USB3_EN_SSIC != 0 Note: When the DWC_USB3_NUM_SSIC_PORTS parameter is set to zero, this bit is Reserved. |
| ghwparams4_11 | 11 | roRead-only | 0x0 | `DWC_USB3_SSIC_NON_SNPS_MPHY This field indicates whether M-PHY or a third-party M-PHY is used with SSIC ports. - 1b0: M-PHY - 1b1: Third-party M-PHY Note: When the DWC_USB3_NUM_SSIC_PORTS parameter is set to zero, this bit is Reserved. |
| ghwparams4_10_9 | 10:9 | roRead-only | 0x0 | `DWC_USB3_SSIC_GEAR This field indicates DWC_USB3_SSIC_GEAR parameter value chosen by the user - 2b00: Reserved - 2b01: HS-G1 - 2b10: HS-G2 - 2b11: HS-G3 Note: When the DWC_USB3_NUM_SSIC_PORTS parameter is set to zero, this field is Reserved. |
| ghwparams4_8_7 | 8:7 | roRead-only | 0x0 | `DWC_USB3_NUM_SSIC_NUM_LANE This bit indicates `DWC_USB3_SSIC_NUM_LANE parameter value chosen by the user - 2b00: Reserved - 2b01: 1 lane - 2b10: Reserved - 2b11: Reserved Note: When the DWC_USB3_NUM_SSIC_PORTS parameter is set to zero, this field is Reserved. |
| ghwparams4_6 | 6 | roRead-only | 0x0 | Reserved |
| ghwparams4_5_0 | 5:0 | roRead-only | 0x4 | `DWC_USB3_CACHE_TRBS_PER_TRANSFER |