PP1_LAST_TILE_POS_START (GPU) Register Description
| Register Name | PP1_LAST_TILE_POS_START |
|---|---|
| Offset Address | 0x000000B010 |
| Absolute Address | 0x00FD4BB010 (GPU) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Last Tile Where Processing Started Register |
PP1_LAST_TILE_POS_START (GPU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:24 | rwNormal read/write | 0x0 | Read undefined. |
| TILEY_START | 23:16 | rwNormal read/write | 0x0 | The y position of the last file that processing has begun. Note: Scaling is equal to that of the Begin New Tile command 15 in the polygon list. |
| _ | 15:8 | rwNormal read/write | 0x0 | Read undefined. |
| TILEX_START | 7:0 | rwNormal read/write | 0x0 | The x position of the last file that processing has begun. Note: Scaling is equal to that of the Begin New Tile command 15 in the polygon list. |