SMMU_CB1_FSRRESTORE (SMMU500) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

SMMU_CB1_FSRRESTORE (SMMU500) Register Description

Register NameSMMU_CB1_FSRRESTORE
Offset Address0x000001105C
Absolute Address 0x00FD81105C (SMMU_GPV)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionRestores the state of SMMU_CBn_FSR, after a reset, for example.

SMMU_CB1_FSRRESTORE (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
bits31:0woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details