OEVTEN (USB3_XHCI) Register Description
| Register Name | OEVTEN |
|---|---|
| Offset Address | 0x000000CC0C |
| Absolute Address |
0x00FE20CC0C (USB3_0_XHCI) 0x00FE30CC0C (USB3_1_XHCI) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | OTG Events Enable Register Setting a bit in this register enables the generation of corresponding events in OEVT and assertion of otg_interrupt due to this event. When the enable bit is 1b0, the event is not be set in OEVT and otg_interrupt is not asserted due to this event. |
OEVTEN (USB3_XHCI) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:28 | roRead-only | 0x0 | Reserved |
| OTGXhciRunStpSetEvntEn | 27 | rwNormal read/write | 0 | OTG Host Run Stop Set Event Enable (OTGXhciRunStpSetEvntEn) When this bit is set, OEVT.OTGXhciRunStpSetEvnt is enabled. If not, the event is disabled. |
| OTGDevRunStpSetEvntEn | 26 | rwNormal read/write | 0 | OTG Device Run Stop Set Event Enable (OTGDevRunStpSetEvntEn) When this bit is set, OEVT.DevRunStpSet event is enabled. If not, that event is disabled. |
| OTGHibEntryEvntEn | 25 | rwNormal read/write | 0 | OTG Hibernation Entry Event Enable (OTGHibEntryEn) When this bit is set, OEVT.HibEntryEvnt is enabled. If not, the event is disabled. |
| OTGConIDStsChngEvntEn | 24 | rwNormal read/write | 0 | OTGCommonEvtInfoEn[0] Connector ID Status Change Event (OTGConIDStsChngEvnt) Set in both A-Dev/B-Dev Mode: This event is generated when there is a change in connector ID status |
| HRRConfNotifEvntEn | 23 | rwNormal read/write | 0 | OTGCommonEvtInfoEn[2] HRRConfNotif Event Enable (HRRConfNotifEvntEn) When this bit is set, OEVT.HRRConfNotifEvnt is enabled. If not, the event is disabled. |
| HRRInitNotifEvntEn | 22 | rwNormal read/write | 0 | OTGCommonEvtInfoEn[1] HRRInitNotif Event Enable (HRRInitNotifEvntEn) When this bit is set, OEVT.HRRInitNotifEvnt is enabled. If not, the event is disabled. |
| OTGADevIdleEvntEn | 21 | rwNormal read/write | 0 | OTGADevEvtInfoEn[5] A-device A-IDLE Event (OTGADevIdleEvntEn) When this bit is set, OEVT.OTGADevIdleEvnt is enabled. If not, the event is disabled. |
| OTGADevBHostEndEvntEn | 20 | rwNormal read/write | 0 | OTGADevEvtInfoEn[4] A-device B-Host End Event Enable (OTGADevBHostEndEvntEn) When this bit is set, OEVT.OTGADevBHostEndEvnt is enabled. If not, the event is disabled. |
| OTGADevHostEvntEn | 19 | rwNormal read/write | 0 | OTGADevEvtInfoEn[3] A-device host event (OTGADevHostEvntEn) When this bit is set, OEVT.OTGADevHostEvnt is enabled. If not, the event is disabled. |
| OTGADevHNPChngEvntEn | 18 | rwNormal read/write | 0 | OTGADevEvtInfoEn[2] A-Dev HNP Change EventEn (OTGADevHNPChngEvntEn) When this bit is set, OEVT.OTGADevHNPChngEvnt is enabled. If not, the event is disabled. |
| OTGADevSRPDetEvntEn | 17 | rwNormal read/write | 0 | OTGADevEvtInfoEn[1] SRP Detect Event Enable (OTGADevSRPDetEvntEn) When this bit is set, OEVT.OTGADevSRPDetEvnt is enabled. If not, the event is disabled. |
| OTGADevSessEndDetEvntEn | 16 | rwNormal read/write | 0 | OTGADevEvtInfoEn[0] Session End Detected Event Enable (OTGADevSessEndDetEvntEn) When this bit is set, OEVT.OTGADevSessEndEvnt is enabled. Otherwise, the event is disabled. |
| Reserved | 15:12 | roRead-only | 0x0 | Reserved |
| OTGBDevBHostEndEvntEn | 11 | rwNormal read/write | 0 | OTGBDevEvtInfoEn[3] B-device B-Host End Event Enable (OTGBDevBHostEndEvntEn) When this bit is set, OEVT.OTGBDevHostEndEvnt is enabled. If not, the event is disabled |
| OTGBDevHNPChngEvntEn | 10 | rwNormal read/write | 0 | OTGBDevEvtInfoEn[2] B-Dev HNP Change Event Enable (OTGBDevHNPChngEvntEn) When this bit is set, OEVT.OTGBDevHNPChngEvnt is enabled. If not, the event is disabled |
| OTGBDevSessVldDetEvntEn | 9 | rwNormal read/write | 0 | OTGBDevEvtInfoEn[1] Session Valid Detected Event Enable (OTGBDevSessVldDetEvntEn) Set in B-device mode only. This event is asserted when there is a valid VBUS from A-device and B-device succeeds in starting a session. |
| OTGBDevVBUSChngEvntEn | 8 | rwNormal read/write | 0 | OTGBDevEvtInfoEn[0] VBUS Change Event Enable (OTGBDevVBUSChngEvntEn) When this bit is set, OEVT.OTGBDevVBUSChngEvnt is enabled. If not, the event is disabled. |
| Reserved | 7:0 | roRead-only | 0x0 | Reserved |