ERR_ATB_ISR (FPD_SLCR) Register Description
| Register Name | ERR_ATB_ISR |
| Offset Address | 0x0000006000 |
| Absolute Address |
0x00FD616000 (FPD_SLCR)
|
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Interrupt Status. |
This is a sticky register that holds the value of the interrupt until cleared. Read: 0: not set. 1: set. Write: 0: ignored. 1: cleared.
ERR_ATB_ISR (FPD_SLCR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
| Reserved | 31:3 | razRead as zero | 0x0 | reserved |
| afifs1 | 2 | wtcReadable, write a 1 to clear | 0x0 | ATB instance 5: FPD Main Switch to M_AXI_HPM1_FPD inteface. |
| afifs0 | 1 | wtcReadable, write a 1 to clear | 0x0 | ATB instance 4: FPD Main Switch to M_AXI_HPM0_FPD inteface. |
| fpds | 0 | wtcReadable, write a 1 to clear | 0x0 | ATB instance 3: FPD Main Switch to SIOU slaves. |